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Дата изменения: Thu Jul 28 18:23:48 2005
Дата индексирования: Sat Dec 22 10:24:56 2007
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Fasti Talk Slide 10





Fasti - The Data Acquisition Board


To get data the central controller need a fast parallel interface, capable to get more than 2-4 megasamples/sec from the A/D stage (CAD). Some commercial board level solutions exist, and we choose a National Instrument 6533 PCI-DIO. We wrote a suitable driver, and we plan to add nicer feature as DMA transfers.

A new version of that board, the 6534, has been announced. The 6534 is plug in replaceable with the 6533, but has a 64Mbites buffer, eliminating the need of the BDF stage.




Fasti - The Buffer FIFO for the digital data (BDF)


To avoid data loss a big FIFO buffer (> 1Mbytes) is placed between the data conversion (CAD) and the parallel interface. If data rate is substantially lower than 0.5Msample/sec (as in L3CCD) or the new 6534 is available, this portion can be eliminated.