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TC215 1024- â 1024-PIXEL CCD IMAGE SENSOR
SOCS014B ­ AUGUST 1989 ­ REVISED DECEMBER 1991

· · · · · · · · · · · ·

High-Resolution, Solid-State Frame-Transfer Image Sensor 17.2-mm Image-Area Diagonal 1000 (H) x 1018 (V) Active Elements in Image-Sensing Area Square Pixels Low Dark Current Electron-Hole Recombination Antiblooming Dynamic Range . . . More Than 60 dB High Sensitivity High Photoresponse Uniformity High Blue Response Single-Phase Clocking Solid-State Reliability With No Image Burn-in, Residual Imaging, Image Distortion, Image Lag, or Microphonics

DUAL-IN-LINE PACKAGE (TOP VIEW)

OUT1 AMP GND OUT2 ADB SUB RST2 RST1 CDB SRG1 SRG2 TRG IDB

1 2 3 4 5 6 7 8 9 10 11 12

24 23 22 21 20 19 18 17 16 15 14 13

ABG2 IAG2 ABG1 IAG1 SUB TDB SUB SUB IAG1 ABG1 IAG2 ABG2

description
The TC215 is a full-frame charge-coupled-device (CCD) image sensor that provides very high-resolution image acquisition for image-processing applications such as robotic vision, medical X-ray analysis, and metrology. The image format measures 12 mm horizontally by 12.216 mm vertically; the image-area diagonal is 17.2 mm. The image-area pixels are 12-µm square. The image area contains 1018 active lines with 1000 active pixels per line. Six additional dark reference lines give a total of 1024 lines in the image area, and 24 additional dark reference pixels per line give a total of 1024 pixels per horizontal line. The full-frame image sensor should be used with a shutter or with strobed illumination to prevent smearing of the image during readout. To prepare the imaging area for image capture, the photoelectric charge that has accumulated in the image pixels can be transferred into the clearing drain in one millisecond. After image capture (integration time), the readout is accomplished by transferring the charge, one line at a time, into two serial registers, each of which contains 512 data elements and 12 dummy elements. The typical serial-register clocking rate is 10 megapixels per second. Operating the TC215 at the typical data rate of one field per frame generates video output at a continuous 15 frames per second. Gated floating-diffusion detection structures are used with each serial register to convert charge to signal voltage. External reset allows the application of off-chip correlated clamp sample-and-hold amplifiers for low-noise performance. To provide high output-drive capability, both outputs are buffered by low-noise, two-stage, source-follower amplifiers. These two output signals can provide a data rate of 20 megapixels per second when combined off chip. At room temperature, the readout noise is 55 electrons and a minimum dynamic range of 60 dB is available.

This MOS device contains limited built-in gate protection. During storage or handling, the device leads should be shorted together or the device should be placed in conductive foam. In a circuit, unused inputs should always be connected to SUB. Under no circumstances should pin voltages exceed absolute maximum ratings. Avoid shorting OUTn to ADB during operation to prevent damage to the amplifier. The device can also be damaged if the output terminals are reverse-biased and an excessive current is allowed to flow. Spec ific guidelines for handling dev i c e s of this ty pe are contained in the public ation Guidelines for Handling Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies available from Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright © 1991, Texas Instruments Incorporated

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TC215 1024- â 1024-PIXEL CCD IMAGE SENSOR
SOCS014B ­ AUGUST 1989 ­ REVISED DECEMBER 1991

description (continued)
The blooming protection incorporated into the sensor is based on recombining excess charge with charge of oppositie polarity in the substrate. This antiblooming is activated by supplying clocking pulses to the antiblooming gate, which is an integral part of each image-sensing element. The TC215 is built using TI-proprietary virtual-phase technology, which provides devices with high blue response, low dark signal, good uniformity, and single-phase clocking. The TC215 is characterized for operation from ­10°C to 40°C.

functional block diagram
Top Drain 19 TDB 16 IAG1 ABG1 IAG2 ABG2 ADB RST2 15 14 13 Amplifiers 4 6 24 Dark Reference Elements 23 24 IAG2 ABG2 Image Area With Blooming Protection 21 IAG1

22

ABG1

OUT2 RST1 OUT1

3 7 1 Multiplexer, Transfer Gates, and Serial Registers

IDB 12 10 9 SRG2 SRG1

11

TRG

12 Dummy Elements 2 AMP GND 8 CDB

Clearing Drain

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TC215 1024- â 1024-PIXEL CCD IMAGE SENSOR
SOCS014B ­ AUGUST 1989 ­ REVISED DECEMBER 1991

sensor topology diagram

1000 Pixels 1 Pixel 22 Pixels 1 Pixel

1018 Lines

6 Lines

OPB 12 12 Dummy Pixels 511 511

Terminal Functions
TERMINAL NAME ABG1 ABG1 ABG2 ABG2 ADB AMP GND CDB IAG1 IAG1 IAG2 IAG2 IDB OUT1 OUT2 RST1 RST2 SRG1 SRG2 SUB SUB SUB SUB TDB TRG NO. 15 22 13 24 4 2 8 16 21 14 23 12 1 3 7 6 9 10 5 17 18 20 19 11 I I I I I I I I O O I I I I I/O I I I I I DESCRIPTION Antiblooming gate for upper image area Antiblooming gate for upper image area Antiblooming gate for lower image area Antiblooming gate for lower image area Supply voltage for amplifier drain bias Amplifier ground Supply voltage for clearing drain bias Upper image-area gate Upper image-area gate Lower image-area gate Lower image-area gate Supply voltage for input diode bias Output signal 1 Output signal 2 Reset gate 1 Reset gate 2 Serial-register gate 1 Serial-register gate 2 Substrate and clock return Substrate and clock return Substrate and clock return Substrate and clock return Supply voltage for top drain bias

Transfer gate All terminals of the same name should be connected together externally (i.e., pin 15 to pin 22, pin 13 to pin 24, etc.).

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TC215 1024- â 1024-PIXEL CCD IMAGE SENSOR
SOCS014B ­ AUGUST 1989 ­ REVISED DECEMBER 1991

detailed description
The TC215 consists of three basic functional blocks: (1) the image-sensing area, (2) the multiplexer block with serial registers and transfer gates, and (3) the low-noise signal-processing amplifier block with charge-detection nodes. The location of each of these blocks is identified in the functional block diagram. image-sensing area Figures 1 and 2 show cross sections with potential well diagrams and top views of image-sensing elements. As light enters the silicon in the image-sensing area, free electrons are generated and collected in the potential wells of the sensing elements. During this time, blooming protection is activated by applying a burst of pulses to the antiblooming gate inputs every horizontal blanking interval. This prevents blooming caused by the spilling of charge from overexposed elements into neighboring elements. After integration is complete, the signal charge is transferred in the dark to the two serial registers, where it is read out line by line. There are 24 full columns of elements at the left edge of the image-sensing area that are shielded from incident light; these elements provide the dark reference used in subsequent video-processing circuits to restore the video black level. There are also six dark lines at the bottom of the sensor. multiplexer with transfer gates and serial registers The multiplexer and transfer gates transfer charge line by line from the image-sensing columns into the corresponding serial registers and prepare it for readout. Figure 3 illustrates the layout of the multiplexing gate that vertically separates the pixels for input into the serial registers. Figure 4 shows the layout of the interface region between the serial-register gates and the transfer gates. Multiplexing is activated during the horizontal blanking interval by applying appropriate pulses to the transfer gates and serial registers; the required pulse timing is shown in Figure 5. A drain is also included to provide the capability to clear the image-sensing area of unwanted charge. Such charge can accumulate in the imager during the start-up of operation or under special circumstances. The clearing timing is illustrated in Figure 6. serial-register readout and video processing After transfer into the serial registers, the pixels are normally read out 180° out of phase (see Figure 7). Each serial register must be reset to the reference level before the next pixel is read out. The timing for the resets and their relationships to the serial-register pulses is shown in Figure 8. Figure 8 also shows the timing for the pixel clamp and sample and hold needed for an off-chip double-correlated sampling circuit. These two output signals can provide a data rate of 20 million pixels per second when combined off chip. After the charge is placed on the detection node, it is buffered and amplified by a low-noise, dual-stage source follower. Each serial register contains 12 dummy elements that are used to span the distance between the serial register and the output amplifier. A schematic is shown in Figure 9. The location of the dummy elements, which are considered to be part of the amplifiers, is shown in the functional block diagram. Figure 10 gives the timing for a single frame of video. Operating the TC215 at the typical data rate of one field per frame generates video output at a continuous 15 frames per second.

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TC215 1024- â 1024-PIXEL CCD IMAGE SENSOR
SOCS014B ­ AUGUST 1989 ­ REVISED DECEMBER 1991

12 µm(H)

Clocked Barrier -IAG Virtual Barrier Antiblooming Gate Virtual Well Antiblooming Clocking Levels -ABG

Light

12 µm(V)

Clocked Well Accumulated Charge

Figure 1. Charge-Accumulation Process
-IAG Clocked Phase

Virtual Phase

Channel Stops

Figure 2. Charge-Transfer Process
Channel Stops

Channel Stop Clocked Wells Virtual Well Clocked Well

SerialRegister Gate

Multiplexing Gate

Transfer Gate

Figure 3. Multiplexing-Gate Layout

Figure 4. Interface-Region Layout

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TC215 1024- â 1024-PIXEL CCD IMAGE SENSOR
SOCS014B ­ AUGUST 1989 ­ REVISED DECEMBER 1991

CSYNC

CBLNK

TRG

SRG1

SRG2

RST1 RST2 CL1 CL2 SH1 SH2 IAG1, 2

High High Low Low Low Low

ABG1, 2

CPOB1

CPOB2

Figure 5. Horizontal Timing

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TC215 1024- â 1024-PIXEL CCD IMAGE SENSOR
SOCS014B ­ AUGUST 1989 ­ REVISED DECEMBER 1991

1 µs Line 1 IAG1 Line 2 Line 1023 Line 1024

IAG2

ABG1,2

TRG

SRG1

SRG2

RST1 High RST2 High

Figure 6. Clearing Timing

Dummy 1 SRG2 2 3 11 12 1

Black Reference 2 11 12 1

Image 2 3

1 SRG1

2

3

12

1

2

12

1

2

3

NOTE A: A minimum of 524 clock pulses is required to transfer out all elements of a serial register. Overclocking is recommended.

Figure 7. Start of Serial-Transfer Timing

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TC215 1024- â 1024-PIXEL CCD IMAGE SENSOR
SOCS014B ­ AUGUST 1989 ­ REVISED DECEMBER 1991

OUT CCD Buffer

Pixel Clamp

Sampleand-Hold Amplifier

SRG SRG1

RST

CL

SH

RST1

OUT1

CL1

SH1

SRG2

RST2

OUT2

CL2

SH2 NOTE A: The video-processing (off-chip) pulses are defined as follows: CL1 = Clamp pulse for video from OUT1 CL2 = Clamp pulse for video from OUT2 SH1 = Sample pulse for the sample-and-hold amplifier for video 1 SH2 = Sample pulse for the sample-and-hold amplifier for video 2 CSYNC = Composite video-sync pulse CBLNK = Composite video-blanking pulse CPOB1 = Dark-reference clamp pulse for video from OUT1 CPOB2 = Dark-reference clamp pulse for video from OUT2

Figure 8. Video-Process Timing

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TC215 1024- â 1024-PIXEL CCD IMAGE SENSOR
SOCS014B ­ AUGUST 1989 ­ REVISED DECEMBER 1991

Reference Generator ADB

CCD Register Clocked Virtual Gate Gate

Detection Node

Reset Gate and Output Diode

Two-Stage SourceFollower Amplifier

OUTn SRGn RSTn

Figure 9. Buffer Amplifier and Charge-Detection Node
Integration (shutter open) Readout 1024 Pulses

Clearing

IAG1,2

TRG 541 Pulses SRG1

SRG2 Start of Serial Transfer ABG1,2

RST1

RST2 Horizonal Timing

Figure 10. Clock Timing Requirements ­ Single-Frame Mode

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TC215 1024- â 1024-PIXEL CCD IMAGE SENSOR
SOCS014B ­ AUGUST 1989 ­ REVISED DECEMBER 1991

spurious nonuniformity specification
The spurious nonuniformity specification of the TC215 CCD grades ­ 30 and ­ 40 is based on several sensor characteristics:

· · ·

Amplitude of the nonuniform line or pixel Polarity of the nonuniform pixel ­ Black ­ White Nonuniform line or pixel count

The CCD sensors are characterized in both an illuminated condition and a dark condition. In the dark condition, the nonuniformity is specified in terms of absolute amplitude as shown in Figure 11. In the illuminated condition, the nonuniformity is specified as a percentage of the total illumination as shown in Figure 12. The pixel nonuniformity specification for the TC215 is as follows (CCD video-output signal is 50 mV ±10 mV):
NONUNIFORMITY TYPE Line White spot (40°C) White spot (25°C) spot Black spot (% of total illumination) spot illumination) Total number of nonuniformities TC215- 30 Maximum amplitude = 1.4 mV Number with amplitude greater than 1 mV is 5 Maximum amplitude = 25 mV Maximum amplitude = 15 mV Maximum amplitude = 25% B + C < 20 Maximum amplitude = 20 mV Maximum amplitude = 30% Number with amplitude greater than 10 mV = B Number with amplitude greater than 10% = C TC215 - 40

mV

Amplitude

% of Total Illumination

t

t

Figure 11. Pixel Nonuniformity, Dark Condition

Figure 12. Pixel Nonuniformity, Illuminated Condition

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TC215 1024- â 1024-PIXEL CCD IMAGE SENSOR
SOCS014B ­ AUGUST 1989 ­ REVISED DECEMBER 1991

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range for ADB, CDB, IDB, TDB (see Note 1) . . . Input voltage range for ABG1, ABG2, IAG1, IAG2, RST1, RST2, Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds ....... SRG1, ....... ....... ...... ...... SRG2, ...... ...... ...... ..... TRG ..... ..... ..... .. . .. .. .. . . . . . . . . . . . . . . . . . . . . . . . . . ... 0V ­15 V ­10°C ­30°C ....... to 15 V to 15 V to 40°C to 85°C 260°C

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to the substrate terminal.

recommended operating conditions
MIN Supply voltage for ADB, CDB, IDB, TDB Substrate bias voltage IAG1, IAG2 SRG1, SRG2 RST1, RST2 High level Low level High level Low level High level Low level High level ABG1, ABG2 Intermediate level§ Low level TRG TRG, SRG1, SRG2, RST1, RST2 Clock frequency, fclock Capacitive load IAG1, IAG2 ABG1, ABG2 OUT1, OUT2 High level Low level 1.5 ­11 1.5 ­11 1.5 ­11 5 ­1.5 ­7.5 1.5 ­11 5.5 ­1. 2 ­7 2 2 2 11 NOM 12 0 2 2.5 ­9 2.5 ­9 2.5 ­9 6 ­ 0.9 ­ 6.5 2.5 ­9 10 1 1 8 pF MHz V MAX 13 UNIT V V

Input voltage, VI g

Operating free-air temperature, TA ­10 40 °C The algebraic convention, in which the least-positive (most negative) value is designated minimum, is used in this data sheet for clock voltage levels. § Adjustment is required for optimal performance.

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TC215 1024- â 1024-PIXEL CCD IMAGE SENSOR
SOCS014B ­ AUGUST 1989 ­ REVISED DECEMBER 1991

electrical characteristics over recommended operating ranges of supply voltage and free-air temperature
PARAMETER Dynamic range (see Note 2) Charge conversion factor Charge transfer efficiency (see Note 3) Signal response delay time, (see Note 4 and Figure 16) Gamma (see Note 5) Output resistance Noise voltage voltage Noise equivalent signal ADB (see Note 6) Rejection ratio at 10 MHz Supply current IAG1, IAG2 Input capacitance, Ci ABG1, ABG2 TRG 15000 8000 350 pF SRGn (see Note 7) ABGn (see Note 8) 1/f noise (5 kHz) Random noise (f = 100 kHz) 0.1 0.08 60 20 40 30 9 mA dB 0.99990 18 0.89 20 0.94 22 0.99 1000 µV/Hz electrons ns MIN 60 6 TYP MAX UNIT dB µV/e

SRG1, SRG2 200 All typical values are at TA = 25 °C. NOTES: 2. Dynamic range is ­ 20 times the logarithm of the mean noise signal divided by the saturation output signal. 3. Charge transfer efficiency is one minus the charge loss per transfer in the output register (1046 transfers). The test is performed in the dark using an electrical input signal. 4. Signal-response delay time is the time between the falling edge of the SRG clock pulse and the output signal valid state. 5. Gamma () is the value of the exponent in the equation below for two points on the linear portion of the transfer function curve (this value represents points near saturation): Exposure (2) Exposure (1)
g

+

Output signal (2) Output signal (1)

6. ADB rejection ratio is ­ 20 times the logarithm of the ac amplitude on OUTn divided by the ac amplitude on ADB. 7. SRGn rejection ratio is ­ 20 times the logarithm of the ac amplitude on OUTn divided by the ac amplitude on SRGn. 8. ABGn rejection ratio is ­ 20 times the logarithm of the ac amplitude on OUTn divided by the ac amplitude on ABGn.

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TC215 1024- â 1024-PIXEL CCD IMAGE SENSOR
SOCS014B ­ AUGUST 1989 ­ REVISED DECEMBER 1991

optical characteristics, TA = 25°C, integration time = 33 ms (unless otherwise noted)
PARAMETER Sensitivity (see Note 9) Sensitivity Saturation signal, Vsat (see Note 11) Maximum usable signal, Vuse Blooming overload ratio (see Note 12) Image-area well capacity Dark current Dark signal (see Note 13) Pixel uniformity Pixel uniformity Column uniformity Column uniformity Shading VO = 1/2 VU (see Note 10) TA = 40°C 40 TA = 21°C TC215-30 TC215-40 TC215-30 TC215-40 TC215-30 TC215-40 No IR filter With IR filter Measured at VU (see Note 10) 320 200 100 60 x 103 0.027 5 5 15 20 1.4 1.4 15% electrons nA/cm2 mV mV mV MIN TYP 518 64 MAX UNIT mV/lx mV/lx mV mV

NOTES: 9. Sensitivity is measured at an integration time of 33 ms with a source temperature of 2859 K. A CM-500 filter is used. Sensitivity is measured at any illumination level that gives an output voltage level less than VU. 10. VU is the output voltage that represents the threshold of operation of antiblooming. VU 1/2 saturation signal. 11. Saturation is the condition in which further increase in exposure does not lead to further increase in output signal. 12. Blooming is the condition in which charge is induced in an element by light incident on another element. Blooming overload ratio is the ratio of blooming exposure to saturation exposure. 13. Dark-signal level is measured from the dark dummy pixels.

timing requirements
MIN IAG1, IAG2 SRG1, SRG2 tr Rise time RST1, RST2 TRG ABG1, ABG2 IAG1, IAG2 SRG1, SRG2 tf Fall time RST1, RST2 TRG ABG1, ABG2 200 10 10 200 100 200 10 10 200 100 ns ns MAX UNIT

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TC215 1024- â 1024-PIXEL CCD IMAGE SENSOR
SOCS014B ­ AUGUST 1989 ­ REVISED DECEMBER 1991

PARAMETER MEASUREMENT INFORMATION
VO Blooming Point With Antiblooming Disabled Blooming Point With Antiblooming Enabled Dependent on Well Capacity

Vsat (min)

Vuse (max)

Level Dependent Upon Antiblooming Gate High Level

Vuse (typ) DR Vn Lux (light input) DR (dynamic range) Vn = Vsat Vuse Vuse

+

camera white clip voltage Vn

noise floor voltage (min) = minimum saturation voltage (max) = maximum usable voltage (typ) = typical user voltage (camera white clip)

NOTES: A. Vuse (typ) is defined as the voltage determined to equal the camera white clip. This voltage must be less than Vuse (max). B. A system trade-off is necessary to determine the system light sensitivity versus the signal/noise ratio. By lowering the Vuse (typ), the light sensitivity of the camera is increased; however, this sacrifices the signal/noise ratio of the camera.

Figure 13. Typical Vsat, Vuse Relationship

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TC215 1024- â 1024-PIXEL CCD IMAGE SENSOR
SOCS014B ­ AUGUST 1989 ­ REVISED DECEMBER 1991

PARAMETER MEASUREMENT INFORMATION
VIH min 100% 90%

Intermediate Level 10% VIL max 0% tr tf

Figure 14. Typical Clock Waveform for ABG1, ABG2, IAG1, and IAG2

VIH min

100% 90%

10% VIL max 0% tr tf

Figure 15. Typical Clock Waveform for RST1, RST2, SRG1, SRG2, and TRG

1.5 V to 2.5 V SRG ­9V ­ 9 V to ­11 V 0%

OUT 90% 100% CCD DELAY Sample and Hold 10 ns 15 ns

Figure 16. SRG and CCD OUT Waveforms

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TC215 1024- â 1024-PIXEL CCD IMAGE SENSOR
SOCS014B ­ AUGUST 1989 ­ REVISED DECEMBER 1991

APPLICATION INFORMATION
VSS OUT GND VCC GND VCC 1 2 3 4 5 6 7 8 9 10 TMS3473B IALVL I/N IAIN ABIN MIDSEL SAIN PD GND VAGB+ VSS VSS IASR ABSR VCC ABLVL IAOUT ABOUT SAOUT VCC VABG­ 20 19 18 17 16 15 14 13 12 11 V

Master Oscillator V IAG1 ABG1 GT1 CBLNK ABG2 CL2 GT2 CL1 IAG2 CSYNC RST2 SH2 RST1 SH1 SRG1 TRG SRG2 User-Defined Timer CLK

ABLVL

CBLNK CL2 CL1 CSYNC SH2 SH1

VCC

2N3904 VABG ­ 100 12 V

Parallel Driver VABG + TMS3473B 1 2 3 4 5 6 7 8 9 10 IALVL I/N IAIN ABIN MIDSEL SAIN PD GND VAGB+ VSS VSS IASR ABSR VCC ABLVL IAOUT ABOUT SAOUT VCC VABG ­ 20 19 18 17 16 15 14 13 12 11



OUT 2 1k



2N3904 12 V 100 ABLVL

V



OUT 1 1k



VCC

TC215 VABG ­ 1 2 3 4 5 6 7 8 9 10 11 12 12 V OUT1 AMP GND OUT2 ADB SUB RST2 RST1 CDB SRG1 SRG2 TRG IDB ABG2 IAG2 ABG1 IAG1 SUB TDB SUB SUB IAG1 ABG1 IAG2 ABG2 24 23 22 21 20 19 18 17 16 15 14 13

Parallel Driver VABG + SN28846 1 2 3 4 5 6 7 8 9 10 SEL0OUT GND PD SRG3IN SRG2IN SRG1IN TRGIN NC SEL1OUT VSS VSS SEL0 NC VCC SRG3OUT SRG2OUT SRG1OUT TRGOUT VCC SEL1 20 19 18 17 16 15 14 13 12 11

12 V

VCC

Image Sensor

Serial Driver SN28846 1 2 3 4 5 6 7 8 9 10 SEL0OUT GND PD SRG3IN SRG2IN SRG1IN TRGIN NC SEL1OUT VSS VSS SEL0 NC VCC SRG3OUT SRG2OUT SRG1OUT TRGOUT VCC SEL1 20 19 18 17 16 15 14 13 12 11

VCC

DC VOLTAGES 12 V ADB 5V VCC ­ 10 V VSS 2V V ­ 2.5 V ABLVL 4V VABG + ­6 V VABG ­

Serial Driver

SUPPORT CIRCUITS DEVICE SN28846DW TMS3473BDW PACKAGE 20 pin small outline 20 pin small outline APPLICATION Serial driver Parallel driver FUNCTION Driver for TRG, SRG1, SRG2, RST1, RST2 Driver for IAG1, IAG2, ABG1, ABG2

Figure 17. Typical Application Circuit Diagram

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TC215 1024- â 1024-PIXEL CCD IMAGE SENSOR
SOCS014B ­ AUGUST 1989 ­ REVISED DECEMBER 1991

MECHANICAL DATA
The package for the TC215 consists of a ceramic base, a glass window, and a 24-lead frame. The glass window is sealed to the package by an epoxy adhesive. The package leads are configured in a dual in-line organization and fit into mounting holes with 2,54 mm (0.1 in) center-to-center spacings.

30,91 (1.217) 30,05 (1.183) 2,67 (0.105) NOM 12,50 (0.492) NOM 2,00 (0.079) NOM DIA 6,80 (0.268) 5,80 (0.228) Optical Center and Package Center (see Note C) T.P. +0.01 (+0.0004) 22,83 (0.899) 22,38 (0.881) 2,54 (1.000)

4,93 (0.194) MAX 3,81 (0.150) NOM

0,33 (0.013) 0,17 (0.007)

20,93 (0.824) 20,83 (0.820)

23,29 (0.917) 22,43 (0.883)

20,93 (0.824) 20,83 (0.820)

1,40 (0.055) 0,64 (0.025)

6,30 (0.248) 4,70 (0.185)

2,54 (0.100) ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES NOTES: A. Each pin centerline is located within 2,54 mm (0.1 inch) of its true longitudinal position. B. The center of the package and the center of the image area are not coincident. C. Maximum rotation is ± 3.5°. 7/94

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IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. In order to minimize risks associated with the customer 's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof.

Copyright © 1998, Texas Instruments Incorporated