Äîêóìåíò âçÿò èç êýøà ïîèñêîâîé ìàøèíû. Àäðåñ îðèãèíàëüíîãî äîêóìåíòà : http://www.stsci.edu/stsci/meetings/nhst/talks/BedabrataPain.pdf Äàòà èçìåíåíèÿ: Tue Apr 15 23:43:57 2003 Äàòà èíäåêñèðîâàíèÿ: Sun Dec 23 03:21:57 2007 Êîäèðîâêà: Ïîèñêîâûå ñëîâà: http astrokuban.info astrokuban

CMOS Imaging Technology for Space Science Applications
Bedabrata Pain, Thomas Cunningham, Suresh Seshadri, Robert Stirbl
Jet Propulsion Laboratory California Institute of Technology bpain@jpl.nasa.gov 818-354-8765

Innovative Designs for the Next Large Aperture Optical/UV Telescope NHST Workshop, STScI, Baltimore April 10-11, 2003

JPL Proprietary

Pain,Cunningham,, Stirbl, Hancock, Wrigley, Ringold, et. al2002


MONOLITHIC CMOS APS CAMERA-ON-A-CHIP
Charge to voltage conversion in each pixel
Low power, miniature, miniature Low Noise Random Access capability Ease of operation and integration
Single-chip imager: " digital camera-on-achip" Standard single power supply
Column Signal Chain
Digital Output Buffer

Timing & Control Processor

Row Driver

Pixel Array

Input interface controller

Analog Output Buffer

Best-suited for ultra-large format imaging
Integration with support circuits Noise does not increase with data rate
PIXEL CROSS-SECTION
Undepleted region
GND
+

Analog to Digital Converter (ADC)

SFin

RST

More radiation tolerant: > 10 Mrad.(Si);

Vdd

p 2x1012 protons/cm2 (p-channel CCD ­ 40x increase in CTI at 2x109 p/cm2)

n+
p-well

n+

n+

p-well n-well
p- epi (lower doping)

Reliability and cost: leverage from multibillion dollar VLSI industry
JPL Proprietary

Depletion region

Pain,Cunningham,, Stirbl, Hancock, Wrigley, Ringold, et. al2002


MINIATURIZATION & SMARTNESS w/APS
Miniaturized Sun-sensor
>3 W

Field-deployable Bio-sensors First Single-chip digital camera
~ 20 mW

First Wireless digital camera

Miniature camera head JPL Proprietary

Miniature star-tracker

DRV camera
Pain,Cunningham,, Stirbl, Hancock, Wrigley, Ringold, et. al2002


WHAT MATTERS
Format QE MTF Noise Dark rate Dark rate after radiation SEU tolerance Proton tolerance Data rate Image persistence Linearity 1 billion >80% Geometric limited <1 e < 0.001 e/s < 0.001 e/s High ~ 1x10 p/cm2
12

Non-planar architecture Reverse-illumination Cross-section engineering @ > 1 MHz, Circuit techniques Passivation implants, increase operating temp. ~ 100 krad, Reduce field inversion Reduce device thickness, circuits CMOS should have advantage digitization; move support electronics close to detector Higher operating temp; circuit Implants
QE
n-well

SFin

RST

Radiation hardness
Vdd

GND p
+

n

+

n+
p-well

Leakage and QE Improved linearity

p- epi

Dark current

Dynamic Range
p+ substrate

QE, Cross-talk

> 1 MHz None High

JPL Proprietary

Pain,Cunningham,, Stirbl, Hancock, Wrigley, Ringold, et. al2002


STRATEGIC ALLIANCE with AGILENT
Align with VLSI technology development · Build devices with tools and techniques universally used · Make necessary changes to the CMOS process for scientific imaging

· · · ·

·

Largest CMOS Supplier Dedicated fab. Facility AMOS Family for Image Sensor (0.35um, 0.25um) Adding 3 implants for dark rate reduction and improved radiation tolerance(layout + dose + energy) Provides access to a commercial foundry to make appropriate modifications

Other s Sharp OmniV is ion Mic ron A gilent

Hy nix

Source: Nikkei Electronics (11 March 2002)

JPL Proprietary

Pain,Cunningham,, Stirbl, Hancock, Wrigley, Ringold, et. al2002


HIGH PERFORMANCE MEGAPIXEL IMAGER
SFin RST V n
+ dd

GND p
+

n n-well p- epi

+

p-well

Low-doped for high QE, low cross-talk

p+ substrate

New Pixel cross-section for improved performance
1.2 1 0.8
Noise
60

Ultra-low noise with CDS
Random (e)

500nm 800nm geometric

50

FPN (e)
40

MTF

30

0.6 0.4

20

10

0.2 0

Excellent MTF
0 0.5 1 pitch*f sig 1.5 2

0

2s CDS

4s gnd-CDS

4s int-CDS

HTS

Hard res et

JPL Proprietary

Pain,Cunningham,, Stirbl, Hancock, Wrigley, Ringold, et. al2002


NOISE REDUCTION
Towards < 1 e- read noise kTC noise is no longer the "fundamental limit"
Conceptual Diagram

APS pixel

Pixel

· CDS not very suited for multiplexed detectors (e.g CMOS, IR ...) because of the flicker noise and system drifts · Feedback used to suppress kTC · Minimal impact on fill-factor Requires only one extra transistor per pixel · Maintains high full-well (> 200 ke) · Fully compatible with 2-D visible/IR imager implementation · Noise constant with readout bandwidth

opamp

Reference shaper

JPL Proprietary

Pain,Cunningham,, Stirbl, Hancock, Wrigley, Ringold, et. al2002


Feedback Reset Pixel
AVdd Mdro
h

1

p

Mflus Vdd

flush

SIMULATED
Noise (Norm. to kTC)
Dotted line: Cin=100 fF Solid line: Cin=10fF

-array

Mac

PIXEL
t

Mrst

0.1

V

pd

Msf

Msel Vfbk V
fbk col sel

10 50 100 1000 10 50 100 1000

0.01 1.E-01

1.E+01

1.E+03 1.E+05 Gain (dB)

1.E+07

1.E+09

Transmission gate

Vout

60 50

MEASURED

+
Column Amplifier

Vref
40
N oise (e)

30 20 10 0

w/o fe e dback with fe e dback

Vlo

ad

Mload

JPL Proprietary

5

10

15

Conversion Gain (uV/e)

Pain,Cunningham,, Stirbl, Hancock, Wrigley, Ringold, et. al2002

20


REVERSE-ILLUMINATED APS
Improving Quantum Efficiency and MTF
Si-substrate (heavily doped) Additional implant Passivation implant

Thinned megapixel imager

Si-epitaxial layer (fully depleted; 10 µm)

Implanted region (on-chip electronics)

FRONT SIDE
Implanted region (pixel circuitry)

Frame-thinning
· Mechanical stability (no warping or wrinkling) · Separate imager performance from support electronics

Thinning carried out by S.Nikzad & T. Jones
JPL Proprietary
Pain,Cunningham,, Stirbl, Hancock, Wrigley, Ringold, et. al2002


OTHER TECHNOLOGY: NOVEL SOI IMAGER
·Pixel in handle-wafer, readout in SOI (isolates sensor from circuit) ·Not only enables SOI imager, but vastly enhances performance ·Planar architecture reduces dark rate and enables more radiation hardness ·Reduced substrate noise due to decoupling via BOX: suitable for highspeed operation ·Better spectral coverage through independent handle-wafer doping ·Ideally suited to vertical integration
RST Gnd SEL

FETs

Column-bus

p-

n++ p-

n

p+ p++

One pixel

With Mike Wood, Spawar, San Diego
JPL Proprietary
Pain,Cunningham,, Stirbl, Hancock, Wrigley, Ringold, et. al2002


MEASURED QE
·Front-illuminated (>80% fill-factor) ·25 µm pixel ·No anti-reflection coating (goes through thin silicon and thin buried oxide) ·Modeled by a 300 mm wafer doped at 1x1013/cm3; with 20 µm depletion width
1 0.9 0.8 0.7 0.6

QE

0.5 0.4 0.3 0.2 0.1 0 300

400

500

600

700

800

900

1000

1100

Wavelength (nm)

JPL Proprietary

JPL Proprietary

Pain,Cunningham,, Stirbl, Hancock, Wrigley, Ringold, et. al2002


RADIATION HARDENING SOI
N+ DRAIN

No channel at mesa edge
POL YG ATE

P+ BODY TIE-TO-SOURCE (BTS) to control floating body

N+ S OURC M ES E A IS LAN D

S BT

· Easily hardened · Excellent immunity to high energy events

BURI ED O XIDE S IL I CON SUBS TR A TE

-02 -03 -04 -05 DRAIN

(A)

-06 -07 -08 -09 -10 -11 -12 -13 -1

MULTI-EDGE DEVICE 1 Mrad

SOURCE

DRAIN

Log I

MULTI-EDGE (40 mesas - 80 edges)
FIELD MESA POLY

EDGELESS DEVICE PRERAD
-0.5 0 0.5

DRAIN SOURCE

BTS

EDGELESS
1 1.5 2
Pain,Cunningham,, Stirbl, Hancock, Wrigley, Ringold, et. al2002

JPL Proprietary

VGATE (V)


RAD-HARD IMAGER RESULTS
Response Unchanged after radiation

0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 400

M edian Spectral Response (uV/ph)

Pre-Rad
0.5 Mrad 1Mrad
1.5 Mrad

5.5 Mrad Total Dose

Proton dose 63 MeV RT @ 2x1012 P/cm2

500

600

700

800

900

1000

1100

Wav e le ngth (nm)

­Response unchanged with dose ­Well-behaved dark-current behavior ­Unbiased to 5.5 Mrad(Si)
Dark Rate (nA/ cm 2)

With BAE Systems, Manassas
10 9 8 7 6 5 4 3 2 1 0 0 250 500 750 Tota l dose (kra d) 1000 1250 1500
Pain,Cunningham,, Stirbl, Hancock, Wrigley, Ringold, et. al2002

Unbiased Bi ased

~ 5 pA/cm2/krad

­In-situ to 1.5 Mrad(Si) ­No bias effects ­No adjustments over temp. or dose ­Minimal dependence of responsivity on dose ­Minimal change in dark current with Protons
JPL Proprietary


APS IN RADIATION ENVIRONMENT
Ec

· No Charge transfer: CTE degradation eliminated · Thin Oxide: oxide charge trapping and threshold shift minimized · Main Problem: Dark Current Rise under Radiation; Interface Traps in Electric Field · Field-Inversion: Device Isolation Dependent · Good SEU Performance: Thinner epilayer; use SOI · High Proton Immunity: less sensitive to bulk damage · Minimal modification of process is required
JPL Proprietary
100000

Tunneling Eact
Ev

e

-

Trap release

h

+

Eliminate Field-Enhanced Leakage

Rayleigh + Exponential

10000

# of pixels

1000

100

10

1 -4 -2 0 2 Normalized dark r ate 4 6 8

Pain,Cunningham,, Stirbl, Hancock, Wrigley, Ringold, et. al2002


ULF IMAGER VIA VERTICAL INTEGRATION
· ULF imagers will require dead-space free mosaicing · Reliability, cost, thermal management are major issues · CMOS more suited for ULF imaging
· · · ·

Vertical Integration

noise does not scale up with data rate (< 2 e read noise at 10 MHz possible) low-power suitable for efficient thermal management small pixel size Integration of support electronics is important · Format: 1 billion pixels · Vertical Integration requires new technology and architecture · Update rate: > 1 Hz · Block-parallel architecture · Noise: < 5 electrons · Wafer-to-wafer bonding
Illumination Imager pixels Illumination

Back-ill. Imager chip
chip dielectric chip dielectric

Wafer-to-wafer bonding

companion chip

PWB (only for data routing)
Thru' Si Interconnect

Chip metallization

JPL Proprietary

Pain,Cunningham,, Stirbl, Hancock, Wrigley, Ringold, et. al2002


VERTICAL INTEGRATION APPROACH
· Remain close to VLSI processing in order to maximize reliability and reduce cost · Wafer-to-wafer bonding through lowtemperature oxide bonding · Block-parallel architecture: Efficient data extraction + minimize interconnect density · Power doesn't scale with # of pixels (no standby power): gigapixel @ 200 mW · No compromise of performance Vertical Integration Imager chip Companion chip

Top view

64x64

2Kx2K

JPL Proprietary

Pain,Cunningham,, Stirbl, Hancock, Wrigley, Ringold, et. al2002


High Speed Photon-Counting
Use photocathode + MCP coupled to event-driven focal-plane array Increase global and local count rates (> 1 million counts per sec): Use specialized random-access capability: ·detect and generate address from the area of interest ·fast readout of pixels that have been hit
MCPs Phosphor Event driven APS
Row decoder Row address gen. logic

Row rst + scan logic

Row comparators

Priority Encoder

Disable latch

ADC

PIXEL ARRAY

To Centroider
Analog sampling capacitors
5

FIFO

Analog cross-bar switch Column scan logic Column comparators

Analog Readout

MCP Intensifier

Fiber taper A
State Machine

10

Priority Encoder

B

C

Disable latch-set Digital cross-bar switch Column address gen. logic

Analog Out 5 differential

PI: Randy Kimble, GSFC
JPL Proprietary

Column decoder

Pain,Cunningham,, Stirbl, Hancock, Wrigley, Ringold, et. al2002


Roadmap?
2000 Component Tech. QE>90 RN<1 DN<1 2005 2010.

LF Intg. Imagers

2Kx2K

D2Kx2K

ULF Technology

> 1Gig
Pain,Cunningham,, Stirbl, Hancock, Wrigley, Ringold, et. al2002

JPL Proprietary